View 17529_1035571.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

document order number: mpc17529 rev 2.0, 09/2005 freescale semiconductor technical data * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2005. all rights reserved. 0.7 a dual h-bridge motor driver with 3.0 v/5.0 v compatible logic i/o the 17529 is a monolithic dual h-bridge power ic ideal for portable electronic applications co ntaining bipolar step motors and/or brush dc-motors (e.g., cameras and disk drive head positioners). the 17529 operates from 2.0 v to 6.8 v, with independent control of each h-bridge via parallel m cu interface (3.0 v- and 5.0 v- compatible logic). the device fe atures on-board charge pump, as well as built-in shoot-through current protection and an undervoltage shutdown function. the 17529 has four operating modes : forward, reverse, brake, and tri-stated (high impedance). the 17529 has a low total r ds(on) of 1.2 ? (max @ 25c). the 17529?s low output resistance and high slew rates provide efficient drive for many types of micromotors. features ?low total r ds(on) 0.7 ? (typ), 1.2 ? (max) @ 25c ? output current 0.7 a (dc), 1.4 a (peak) ? shoot-through current protection circuit ?3.0 v/ 5.0 v cmos-compatible inputs ? pwm control input frequency up to 200 khz ? built-in charge pump circuit ? low power consumption ? undervoltage detection and shutdown circuit ? pb-free packaging designated by suffix code ev figure 1. 17529 simplified application diagram dual h-bridge ev suffix (pb-free) 98asa10616d 20-terminal vmfp 17529 ordering information device temperature range (t a ) package mpc17529ev/el -20c to 65c 20 vmfp vdd cres c1l c1h c2l c2h in2b oe in2a in1a out2b out2a out1b out1a vm 1/2 gnd mcu in1b 5.0 v 5.0 v 17529 bipolar step motor n s pgnd1/2
analog integrated circuit device data 2 freescale semiconductor 17529 internal block diagram internal block diagram figure 2. 17529 simplifi ed internal block diagram vm1 out2b out2a out1a pgnd2 in1a c2h in1b c1h c2l c1l vdd low- shutdown charge level shifter vm2 out1b in2a in2b oe lgnd pgnd1 control predriver pump voltage h-bridge h-bridge logic v dd cres
analog integrated circuit device data freescale semiconductor 3 17529 terminal connections terminal connections figure 3. 17529 terminal connections table 1. terminal function description terminal terminal name formal name definition 1 vdd control circuit power supply positive power source connection for control circuit. 2 in1a logic input control 1a logic input control of out1a (refer to table 5, truth table , page 7 ). 3 in1b logic input control 1b logic input control of out1b (refer to table 5, truth table , page 7 ). 4 oe output enable logic output enable control of h-bridges (low = true). 5 out2a h-bridge output 2a output a of h-bridge channel 2. 6 pgnd1 power ground 1 high-current power ground 1. 7 out1a h-bridge output 1a output a of h-bridge channel 1. 8 vm1 motor drive power supply 1 positive power source connection for h-bridge 1 (motor drive power supply). 9 cres predriver power supply internal triple charge pump output as predriver power supply. 10 c2h charge pump 2h charge pump bucket capacitor 2 (positive pole). 11 c1h charge pump 1h charge pump bucket capacitor 1 (positive pole). 12 c1l charge pump 1l charge pump bucket capacitor 1 (negative pole). 13 c2l charge pump 2l charge pump bucket capacitor 2 (negative pole). 14 out1b h-bridge output 1b output b of h-bridge channel 1. 15 pgnd2 power ground 2 high-current power ground 2. 16 out2b h-bridge output 2b output b of h-bridge channel 2. 17 vm2 motor drive power supply 2 positive power source connection for h-bridge 2 (motor drive power supply). 18 in2b logic input control 2b logic input control of out2b (refer to table 5, truth table , page 7 ). 19 in2a logic input control 2a logic input control of out2a (refer to table 5, truth table , page 7 ). 20 lgnd logic ground low-current logic signal ground. vdd in1b out1a vm1 cres c2h oe out2a pgnd1 in1a lgnd vm2 out2b pgnd2 out1b c2l c1l c1h in2a in2b 4 5 6 7 8 9 10 2 3 20 18 14 13 12 11 17 16 15 19 1
analog integrated circuit device data 4 freescale semiconductor 17529 maximum ratings maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise noted . exceeding the ratings may cause a malfunction or permanent damage to the device. rating symbol value unit motor supply voltage v m -0.5 to 8.0 v charge pump output voltage vc res -0.5 to 14 v logic supply voltage v dd -0.5 to 7.0 v signal input voltage v in -0.5 to v dd + 0.5 v driver output current continuous peak (1) i o i o pk 0.7 1.4 a esd voltage human body model (2) machine model (3) v esd1 v esd2 1500 200 v operating junction temperature t j -20 to 150 c operating ambient temperature t a -20 to 65 c storage temperature range t stg -65 to 150 c thermal resistance (4) r ja 120 c/w power dissipation (5) p d 1040 mw soldering temperature (6) t solder 260 c notes 1. t a = 25 c, 10 ms pulse at 200 ms interval. 2. esd1 testing is performed in accor dance with the human body model (c zap = 100 pf, r zap = 1500 ? ). 3. esd2 testing is performed in acco rdance with the machine model (c zap = 200 pf, r zap = 0 ? ). 4. mounted on 37 x 50 cu area (1.6 mm fr-4 pcb). 5. t a = 25 c. 6. soldering temperature limit is for 10 seconds maximum duratio n. not designed for immersion sold ering. exceeding these limits may cause malfunction or permanent damage to the device.
analog integrated circuit device data freescale semiconductor 5 17529 static electrical characteristics static electrical characteristics table 3. static electric al characteristics characteristics noted under conditions t a = 25 c, v dd = v m = 5.0 v, gnd = 0 v unless otherwise noted. characteristic symbol min typ max unit power (vm1, vm2, vdd) motor supply voltage v m 2.0 5.0 6.8 v logic supply voltage v dd 2.7 5.0 5.6 v driver quiescent supply current (no signal input) i qm ? ? 1.0 a logic quiescent supply current (no signal input) (7) i qvdd ? ? 1.0 ma operating power supply current logic supply current (8) charge pump circuit supply current (9) i dvdd i cres ? ? ? ? 3.0 0.7 ma low v dd detection voltage (10) v dddet 1.5 2.0 2.5 v driver output on resistance (11) r ds(on) ? 0.7 1.2 ohms gate drive (c1l ? c1h, c2l ? c2h, cres) gate drive voltage v cres 12 13 13.5 v recommended external capacitance (c1l ? c1h, c2l ? c2h, c res ? gnd) c cp 0.01 0.1 1.0 f control logic ( oe , n1a, n1b, n2a, n2b) logic input voltage v in 0.0 ? v dd v logic inputs (2.7 v < v dd < 5.7 v) high-level input voltage low-level input voltage high-level input current low-level input current oe terminal input current low v ih v il i ih i il i oil oe v dd x 0.7 ? ? -1.0 ? ? ? ? ? 50 ? v dd x 0.3 1.0 ? 100 v v a a a notes 7. i qvdd includes the current to predriver circuit. 8. i vdd includes the current to predriver circuit at f in = 100 khz. 9. at f in = 20 khz. 10. detection voltage is defined as when t he output becomes high-impedance after v dd drops below the detection threshold. when the gate voltage v cres is applied from an external source, v cres = 7.5 v. 11. source + sink at i o = 0.7 a.
analog integrated circuit device data 6 freescale semiconductor 17529 dynamic electrical characteristics dynamic electrical characteristics table 4. dynamic electri cal characteristics characteristics noted under conditions t a = 25 c, v dd = v m = 5.0 v, gnd = 0 v unless otherwise noted. characteristic symbol min typ max unit input (in1a, in1b, oe, in2a, in2b) pulse input frequency f in ? ? 200 khz input pulse rise time (12) t r ? ? (13) 1.0 s input pulse fall time (14) t f ? ? (13) 1.0 s output (out1a, out1b, out2a, out2b) propagation delay time (15) turn-on time turn-off time t plh t phl ? ? 0.1 0.1 0.5 0.5 s charge pump wake-up time (16) t vgon ? 1.0 3.0 ms low-voltage detection time t vdddet ? ? 10 ms notes 12. time is defined between 10% and 90%. 13. that is, the input waveform slope must be steeper than this. 14. time is defined between 90% and 10%. 15. load of output is 8.0 ? resistance. 16. c cp = 0.1 f.
analog integrated circuit device data freescale semiconductor 7 17529 timing diagrams timing diagrams figure 4. t plh , t phl , and t pzh timing figure 5. low-voltage detection timing diagram figure 6. charge pump ti ming diagram 10% in1, 50% outa, outb in2, 90% t plh t phl oe t vdddet 0% i m 50% t vdddet v dddeton v dddetoff 90% (<1.0 a) v dd 0.8 v/ 2.5 v/3.5 v 1.5 v t vgon v dd vcres 11 v table 5. truth table input output oe in1a in2a in1b in2b out1a out2a out1b out2b l l l l l l h l h l l l h l h l h h z z h x x z z h = high. l = low. z = high impedance. x = don?t care. oe terminal is pulled up to v dd with internal resistance.
analog integrated circuit device data 8 freescale semiconductor 17529 system / application information introduction system / application information introduction the 17529 is a monolithic dual h-bridge ideal for portable electronic applications to control bipolar step motors and brush dc motors such as those found in camera lens assemblies, camera shutters, optical di sk drives, etc. the 17529 operates from 2.0 v to 6.8 v, providing dual h-bridge motor drivers with parallel 3.0 v- or 5.0 v-compatible i/o. the device features an on-board charge pump, as well as built-in shoot-through current pr otection and undervoltage shutdown. the 17529 has four operating modes: forward, reverse, brake, and tri-stated (high impedance). the mosfets comprising the output bridge have a total source + sink r ds(on) 1.2 ? . the 17529 can simultaneously drive two brush dc motors or, as shown in the simplified application diagram on page 1, one bipolar step motor. the drivers are designed to be pwm?ed at frequencies up to 200 khz. functional terminal description control circuit power supply (vdd) the v dd terminal carries the logic supply voltage and current into the logic sections of the ic. v dd has an undervoltage threshold. if the supply voltage drops below the undervoltage threshold, the output power stage switches to a tri-state condition. when the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input terminals. logic input control (in1a, in1b, in2a, and in2b) these logic input terminals control each h-bridge output. in1a logic high = out1a high. however, if all inputs are taken high, the outputs bridges are both tri-stated (refer to table 5, truth table , page 7 ). output enable (oe) the oe terminal is a low = true enable input. when oe = high, all h-bridge output s (out1a, out1b, out2a, and out2b) are tri-stated (high-impedance), regardless of logic input (in1a, in1b, in2a, and in2b) states. h-bridge output (out1a, out1b, out2a, and out2b) these terminals provide connect ion to the outputs of each of the internal h-bridges (see figure 2, 17529 simplified internal block diagram , page 2 ). motor drive power supply (vm1 and vm2) the vm terminals carry the main supply voltage and current into the power sections of the ic. this supply then becomes controlled and/or modulat ed by the ic as it delivers the power to the loads at tached between the output terminals. all vm terminals mu st be connected together on the printed circuit board. charge pump (c1l and c1h, c2l and c2h) these two pairs of terminals, the c1l and c1h and the c2l and c2h, connect to the external bucket capacitors required by the internal charge pump. the typical value for the bucket capacitors is 0.1 f. predriver power supply (c res ) the c res terminal is the output of the internal charge pump. its output voltage is approximately three times the v dd voltage. the vcres voltage is power supply for internal predriver circuit of h-bridges. power ground (pgnd) power ground terminals. they must be tied together on the pcb. logic ground (lgnd) logic ground terminal.
analog integrated circuit device data freescale semiconductor 9 17529 applications functional terminal description applications typical application figure 7 shows a typical application for the 17529. when applying the gate voltage to the c res terminal from an external source, be sure to connect it via a resistor equal to, or greater than, r g = v cres / 0.02 ? . the internal charge pump of th is device is generated from the vdd supply; therefore, ca re must be taken to provide sufficient gate-source voltage for the high-side mosfets when v m >> v dd (e.g., v m = 5.0 v, v dd = 3.0 v), in order to ensure full enhancement of the high-side mosfet channels. figure 7. 17529 typical application diagram conducted electromotive force (cemf) snubbing techniques care must be taken to protect the ic from potentially damaging cemf spikes induced when commutating currents in inductive loads. typical practice is to provide snubbing of voltage transients by placing a capacitor or zener at the supply terminal (vm) (see figure 8 ). figure 8. cemf snubbing techniques pcb layout when designing the printed circuit board (pcb), connect sufficient capacitance between power supply and ground terminals to ensure proper filter ing from transients. for all high-current paths, use wide co pper traces and shortest possible distances. mcu 17529 5.0 v gnd c1l c1h c2l c2h c res in1b in2a in2b oe vm vdd out1b out2b 0.01 f out1a in1a out2a nc nc nc nc v c res < 14 v r g > v c res /0.02 ? r g nc = no connect 175xx 5.0 v 5.0 v gnd c1l c1h c2l c2h vm vdd out out 175xx 5.0 v 5.0 v gnd c1l c1h c2l c2h cres vm vdd out out cres this paragraph is boilerplate - you may add to it but, can not change wording. you may change numeric values
analog integrated circuit device data 10 freescale semiconductor 17529 applications package dimensions package dimensions for the most current package revision, visit www.freescale.com and perform a keyword search using the 98a listed below. . ev (pb-free) suffix 20-lead vmfp plastic package 98asa10616d issue a
analog integrated circuit device data freescale semiconductor 11 17529 revision history revision history revision date description of changes 2.0 9/2005 ? implemented revision history page ? converted to freescale format
mpc17529 rev 2.0 09/2005 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2005. all rights reserved. how to reach us: home page: www.freescale.com e-mail: support@freescale.com usa/europe or locations not listed: freescale semiconductor technical information center, ch370 1300 n. alma school road chandler, arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) support@freescale.com japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com

▲Up To Search▲

Price & Availability of 17529

	To Download 17529 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .